Apparatus and method for radio frequency de-coupling and bias voltage control in a plasma reactor

ABSTRACT

Provided is a method and apparatus for controlling a bias voltage over a wide range and for de-coupling dual radio frequency (RF) currents to allow for independent control of plasma density and ion energy of a plasma for processing a substrate. An exemplary apparatus provides a plasma processing chamber which includes a bottom electrode configured to hold a substrate and first and second RF power supplies being connected to the bottom electrode. Also included is a top electrode which is electrically isolated from a top ground extension. A filter array defining a set of filter settings is included. A switch is coupled to the top electrode and the switch is configured to interconnect the top electrode to one of the filter settings. The filter settings are configured to enable or disable RF current generated from one or both of the RF power supplies from passing through the top electrode.

CROSS REFERENCE TO RELATED APPLICATIONS

This application is a divisional application of U.S. Pat. Appl. Ser. No. 09/895,363, filed on Jun. 29, 2001, now U.S. Pat. No. 6,770,166, issued on Aug. 3, 2004, entitled “APPARATUS AND METHOD FOR RADIO FREQUENCY DE-COUPLING AND BIAS VOLTAGE CONTROL IN A PLASMA REACTOR”, which is herein incorporated by reference in its entirety.

BACKGROUND OF THE INVENTION

1. Field of the Invention

This invention relates to semiconductor manufacturing and more particularly to a method and apparatus for controlling the bias voltage at a wafer in a plasma etch reactor and the de-coupling of the radio frequency (RF) in the case of use of multi-RF sources.

2. Description of the Related Art

Plasma etch reactors are currently available with a dual radio frequency (RF) system, where each RF system can operate at a different frequency. FIG. 1 illustrates diagram 100 depicting a prior art dual frequency RF system containing two electrodes. The reactor of diagram 100 contains an RF-driven electrode 104 and a passive electrode 102 with a wafer 116 disposed on top of the RF-driven electrode 104. The RF currents are supplied to the RF driven electrode via hard bolted metal connection 110. Upon activation of the RF power source, the currents enter the plasma region via the RF driven electrode and follow the same paths through the reactor to the passive electrode 102 as depicted by arrows 114. Additionally, the RF currents proceed through the plasma region to ground extensions 116 and 118 as illustrated by arrows 114 a. Since the current paths of the 27 megahertz (MHz) and the 2 MHz are similar, the 2 MHz and the 27 MHz frequencies are not de-coupled.

The prior art plasma reactors can not independently control the plasma density and the ion energy of the plasma in the chamber of the reactor. Typically, the higher frequency of the dual RF system influences the plasma density, while the lower frequency influences the voltages in the reactor, in turn affecting the ion energy. However, since the dual frequencies are coupled, it is not possible to independently control plasma density and the ion energy. While the power supplied for one RF system of the dual frequencies may be modified to increase or decrease the plasma density, the modification also has an effect on the ion energy. That is to say, the vectors controlling the plasma density and the ion energy are not orthogonal in a system where both frequencies are coupled. Therefore, a change in one parameter, such as the plasma density, also affects the other parameter (ion energy) and vice versa.

Additionally, the ratio of the area of the passive electrode to the area of the RF-driven electrode determines the bias voltage at the wafer. For example, as the area of the RF-driven electrode decreases in relation to that of the passive electrode, the bias voltage at the RF-driven electrode will increase. Consequently, since the wafer sits on the RF-driven electrode, the bias voltage at the wafer of the ions increases. As a result, the energy impinging on the wafer during etch operations increases. While high ion energy resulting from a high bias voltage, may be beneficial for some etch processes, it is undesirable for others. For example, high ion energy is preferred for high aspect ratio etching, i.e., drilling deep small contact holes in a substrate. Other processes, such as etching a trench, however, are optimal at lower ion energies. Unfortunately, the bias voltage control at the wafer is limited due to the geometry of the plasma etch chamber in particular, due to the electrode area ratio.

While it is possible to transfer the wafer to a plasma reactor having a different geometry, i.e., smaller diameter passive electrode for processes requiring lower ion energies, there is the added expense of supplemental capital equipment and the risk of contamination of the wafer because of additional handling. Another alternative would be to replace the passive electrode with a smaller diameter electrode, however, this alternative again adds cost and only exacerbates the contamination and handling issues.

As a result, there is a need to solve the problems of the prior art to allow for greater independent control of plasma density and ion energy of the chamber to optimally accommodate various etch processes. Additionally, there is a need to control the bias voltage at the RF-driven electrode over a wide range in order to adapt the reactor so that it may be finely tuned for various etch processes.

SUMMARY OF THE INVENTION

Broadly speaking, the present invention fills these needs by providing a method and apparatus for controlling the bias voltage at the wafer over a broad range. Additionally, the invention provides a method and apparatus to de-couple dual RF currents (having different frequencies) thereby allowing for independent control of plasma density and ion energy of a plasma. It should be appreciated that the present invention can be implemented in numerous ways, including as an apparatus, a system, a device, or a method. Several inventive embodiments of the present invention are described below.

In one embodiment, an apparatus for a plasma processing chamber is provided. In this embodiment, the processing chamber includes an RF-driven electrode configured to hold a substrate and a first and second radio frequency (RF) power supply connected to the RF-driven electrode. Also included is a passive electrode which is surrounded but electrically isolated from a ground extension. A filter array defining a set of filter settings is included. A switch is coupled to the top electrode and the switch is configured to interconnect the top electrode to one of the filter settings. The filter settings are configured to enable or disable RF current generated from one or both of the RF power supplies from passing through the top electrode.

In another embodiment of the invention an apparatus for an etch system having selectable modes of operation is provided. In this embodiment, an RF-driven electrode configured to accept a first and second RF current from a first and second RF generator is included. A passive electrode defined over the RF-driven electrode defining a plasma region therebetween and the passive electrode being electrically floating is included. Also included in this embodiment is a selector switch configured to enable passage of one both or none of the first and second RF currents through the passive electrode.

In yet another embodiment of the invention, an apparatus for de-coupling dual frequencies used in plasma etching is provided. In this embodiment, a plasma etch reactor is included. The plasma etch reactor includes a bottom and top electrode, a first and second RF power supply connected to the bottom electrode and a plasma region defined by the top and bottom electrode. The top electrode is electrically isolated from a top ground extension. A first RF return path to the first and second power supplies passes through the top electrode is included. A second RF current return path to the first and second power supplies passes through a ground extension is also included. A selector switch configured to block one both or none of the RF currents from the first RF current return path is included.

In still another embodiment of the invention, an apparatus for etching a substrate is provided. In this embodiment, a first and second power supply configured to deliver RF currents to a bottom electrode is included. A top electrode defining a first return path to the power supplies and a top and bottom ground extension defining a second and third return path to the power supplies are also included. A selector switch having selectable modes of operation where one, all or none of the RF currents are blocked from the first return path is included.

In still yet another embodiment, a method for etching a wafer in a plasma etch chamber is provided. The method includes providing an etch system having selectable modes of operation to process a substrate. Then, an etch recipe configured to set an etch environment in the etch system is selected. Next, one of the modes of operation to establish a selected bias voltage at the substrate is selected. Then, an etch occurring under the set etch environment and the selected bias voltage is performed.

The advantages of the present invention are numerous. Most notably, the apparatus and method allow control of the bias voltage at the substrate over a wide range. By selectively blocking RF currents from a return path, the effective area ratio of the top and bottom electrodes is modified, thereby influencing the bias voltage. Hence, the built-in bias voltage restrictions created by the design of the plasma etch chamber are circumvented. Additionally, the selective blocking of the RF currents allows for de-coupling dual RF current supplied to the etch chamber. Therefore, a more independent control of the plasma density and the ion energy is achievable under these conditions.

Other aspects and advantages of the invention will become apparent from the following detailed description, taken in conjunction with the accompanying drawings, illustrating by way of example the principles of the invention.

BRIEF DESCRIPTION OF THE DRAWINGS

The present invention will be readily understood by the following detailed description in conjunction with the accompanying drawings, and like reference numerals designate like structural elements.

FIG. 1 illustrates a block diagram depicting a prior art dual frequency RF system containing two electrodes.

FIG. 2 illustrates a block diagram depicting a cross section of a plasma etch reactor with a selector switch positioned to allow for low frequency RF current passage.

FIG. 3 illustrates a block diagram depicting a cross section of a plasma etch reactor with a selector switch positioned to allow for high frequency RF current passage.

FIG. 4 illustrates block a diagram depicting a cross section of a plasma etch reactor with a selector switch positioned to block each of the high and low frequency RF currents.

FIG. 5 illustrates a block diagram depicting a cross section of a plasma etch reactor with a selector switch positioned such that neither of the low nor high frequency RF currents are blocked.

FIG. 6 illustrates a flowchart providing a method for processing a substrate in an etch system having selectable modes of operation.

FIG. 7 illustrates a block diagram depicting a control system for executing an etch recipe for etch operations performed in a plasma etch reactor.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

An invention is described for an apparatus and a method for de-coupling the dual frequencies of a plasma etch reactor, thereby allowing for greater and independent control over the ion energy and the plasma density. It will be obvious, however, to one skilled in the art, that the present invention may be practiced without some or all of these specific details. In other instances, well known process operations have not been described in detail in order not to unnecessarily obscure the present invention.

The embodiments of the present invention provide an apparatus and method for de-coupling the dual frequencies of a plasma etch reactor in order to independently control plasma density and ion energy, as well as for controlling the bias voltage at a wafer over a wide range of voltages. In one embodiment, a selector switch is adapted to interconnect an array of circuit filters to the passive electrode. The filters are configured to enable or disable the passage of radio frequency (RF) currents employed by the plasma reactor to ignite the plasma. By selectively blocking one or more of the RF currents from the passive electrode, the effective area ratio between the passive electrode and the RF driven (bottom) electrode is modified. In response to the modification of the area ratio, the bias voltage at the RF driven electrode is altered since the bias voltage is depends on this area ratio.

Additionally, an insulator is interposed between the passive (top) electrode and its corresponding ground extension. The introduction of the insulator between the top ground extension and the passive electrode permits the passive electrode to be electrically isolated from the rest of the chamber. In one embodiment of the invention one of the dual RF currents are de-coupled allowing for independent control of the ion energy and the plasma density. Accordingly, the various orientations of the selector switch allow for the flexibility to optimize the reactor chamber conditions to perform etch operations in an optimal environment.

By orienting the selector switch in various positions, thereby engaging different filters, it becomes possible to execute multiple, but different, etch operations in the same chamber. For example, an etch operation requiring high ion energy impinging on the wafer may be followed by an etch operation requiring low ion energy in the same chamber without the need for making any equipment changes inside the etch chamber or breaking vacuum within the etch chamber to make modifications. Upon completion of a first etch in which the selector switch is positioned to provide a high ion energy, the selector switch automatically moves to a second position for a second etch in one embodiment of the invention. The automatic movement of the selector switch is accomplished through programmed instructions defined by an etch recipe that is provided to the etch reactor in accordance with one embodiment. Additional details of the apparatus and method are provided below in reference to the embodiments illustrated in FIGS. 2–6.

FIG. 2 illustrates block diagram 130 depicting a cross section of a plasma etch reactor with a selector switch positioned to allow for low frequency RF current passage. Block diagram 130 includes two radio frequency (RF) generators 132 and 134. In accordance with one embodiment of the invention, one of the power generators provides a low frequency RF current, such as 2 megahertz (MHz), and the other power generator provides a high frequency RF current, such as 27 MHz. The frequencies of the RF generators are mentioned for providing possible examples only and are not meant to limit the invention to those frequencies. It should be appreciated that matching circuits are included downstream of each of the generators 132 and 134 with appropriate filters to prevent signal reflections. Generators 132 and 134 are connected to the bottom electrode 138 through connection 136. Bottom electrode 138 is also referred to as the RF-driven electrode. In accordance with one embodiment of the invention, connection 136 is a hard-bolted metal to metal connection. Disposed on top of bottom electrode 138 is wafer 170. Bottom electrode 138 is insulated from ground extension 142 by insulator 140. In one embodiment of the invention the insulator 140 is quartz. In another embodiment of the invention, bottom ground extension 142 provides a current return path for generators 132 and 134.

Continuing with FIG. 2, a plasma region 144 is defined between bottom electrode 138, top electrode 146 and confinement rings 148. The top electrode 146 is also referred to as the passive electrode. Top electrode 146 is insulated from ground extension 152 by insulator 150. In one embodiment, insulator 150 is quartz. It should be appreciated that insulating the top electrode 146 from the ground extension 152 causes the top electrode to be electrically floating, i.e., electrically isolated. Ground extension 152 provides a return path for RF current to RF generators 132 and 134. Connected to top electrode 146 is selector switch 154. In accordance with one embodiment of the invention, selector switch 154 is positioned such that it connects the passive electrode to allow a low frequency RF current, such as 2 MHz, to pass through the top electrode. Circuit 156 is configured such that the low frequency RF current passes through the top electrode while the high frequency RF current, such as 27 MHz, is blocked from passing through the top electrode. As such, only the low frequency RF current, depicted by arrows 166, is allowed to pass through the return path defined by the top electrode 146, the selector switch 154, the low pass circuit 156 and the return extension 164 to the power supplies 132 and 134. The high frequency RF current is blocked from the return path defined by the passive electrode 146 and is forced to return to the appropriate power supply through return paths defined by ground extensions 142 and 152 as depicted by arrows 168. Accordingly, the exclusion of the high frequency current from passive electrode 146, forces the high frequency RF current to take a different route through the plasma region 144. It is important to note that both of the low and the high frequency currents pass through the plasma region 144, thus maintaining the plasma, yet the dual frequencies are de-coupled allowing for independent control of the plasma density and ion energy.

In accordance with one embodiment of the invention depicted in FIG. 2, a negligible portion of the low frequency RF current will follow the return path defined by ground extensions 142 and 152. However, due to the relatively small flow as compared to the flow passing through the top electrode, this negligible portion has little impact to the de-coupling effect. It should be appreciated that the separate return paths followed by the low frequency RF current and the high frequency RF current allow for increasing or decreasing the power supply of one RF frequency without analogously effecting the power of the other RF frequency. Accordingly, independent control of plasma density and ion energy can now be achieved through the modulation of the power to either of the RF generators 132 and 134.

In addition, the de-coupling of the dual RF frequencies as illustrated in FIG. 2, allows for a wide range of control over the bias voltage at the wafer 170. In a capacitively-coupled reactor with two electrodes, the bias voltage is proportional to the ratio of the areas of the top and bottom electrode. In mathematical terms this relationship can be expressed as: V_(bias)∝(A₁/A₂)^(n). Where V_(bias) is the bias voltage of the bottom electrode, A₁ is the area of the top electrode, A₂ is the area of the bottom electrode and the exponent n depends on the particular geometry of the reactor and may range between 1 and 4 Referring back to the embodiment illustrated in FIG. 2, the effective area ratio between the top electrode 146 and the bottom electrode 138 has been decreased since the high frequency RF current is forced to return through the small area ground extensions 142 and 152. Approximately half of the RF current can not pass through the top electrode 146 any longer, thereby making the effective area ratio smaller. Therefore, the bias voltage at the wafer decreases due to the lower area ratio. Consequently, the selector switch being positioned in this orientation allows for optimization of the etch system for applications requiring lower ion energies at the wafer such as etching a trench under dual damascene processing.

FIG. 3 illustrates block diagram 172 depicting a cross section of a plasma etch reactor with a selector switch positioned to allow for high frequency RF current passage through the top electrode 146. In block diagram 172, the selector switch 154 is positioned so that a high frequency RF current will pass through. Circuit 158 allows for the high frequency RF current to pass while blocking the low frequency RF current. Therefore, the low frequency RF current, depicted by arrows 166, is forced to return via the ground extensions 142 and 152 to the appropriate power generator 132 and 134. On the other hand, the high frequency RF current may propagate through the passive electrode 146, the selector switch 154, the high pass circuit 158 and the return extension 164 to the appropriate power generator. Here again, the dual RF frequencies are de-coupled because of the separate return paths.

Similar to FIG. 2, the bias voltage at the wafer in FIG. 3 will be significantly lower due to the lower area ratio. Since, the frequencies are de-coupled with the high frequency being able to pass through the top electrode 146, the power of the higher frequency may be increased or decreased to influence the plasma density in the plasma region 144 without significantly impacting the ion energy. In mathematical terms, de-coupling the dual RF frequencies allows for the vectors controlling the plasma density and ion energy to behave in an orthogonal manner. In one embodiment of the invention, the plasma etch system has two controllers, one for controlling the power for the higher frequency RF generator and one for controlling the power for the lower frequency RF generator. As mentioned above, the power for the higher frequency RF generator controls the plasma density and the power for the lower frequency RF generator controls the ion energy of the plasma. High aspect ratio contact processes (HARC) requires high ion energies and high plasma densities, Organosilicate glass (OSG) low-k (dielectric constant) films require medium plasma densities and lower ion energies, while porous low-k films require low ion energies and low plasma densities.

FIG. 4 illustrates block diagram 176 depicting a cross section of a plasma etch reactor with a selector switch positioned to block each of the high and low frequency RF currents. In block diagram 176 selector switch 154 is engaged with ultra low pass circuit 160. In this embodiment, ultra low pass circuit 160 is configured to block the high and low frequency RF currents being generated from power supplies 132 and 134. Accordingly, the 2 MHz and the 27 MHz currents are blocked from the top electrode 146. It should be appreciated that the RF currents, depicted by arrows 166 and 168 are coupled in this embodiment, as they follow the same path through the plasma region 144. With this embodiment, the high and low frequency RF currents are forced to return to their corresponding generators via ground extensions 152 and 142.

Contrary to FIGS. 2 and 3, the de-coupling is minimal as embodied in FIG. 4. However, the bias voltage at the wafer 170 is the lowest in this embodiment of the invention. Here, the area ratio is determined by the ratio of the area of the ground extensions 142 and 152 to the area of the bottom electrode 138. The top electrode 146 is not a factor in this embodiment since each RF current is blocked from the top electrode 146. As can be seen, the area ratio of this embodiment becomes very small since the area of the ground extensions 142 and 152 is much smaller than the area of the bottom electrode 138. In one embodiment, the bias voltage at the wafer approaches zero, which in turn correlates to almost no ion energy in the plasma region 144. This application lends itself particularly well to dual damascene integration schemes that require extremely low bias voltages. Dual damascene etch operations well suited for this embodiment include trench etching. Other etch operations that may see a benefit include for example, films with porous low-k materials.

It should be appreciated that the filter circuitry for the low pass filter circuit 156, the high pass filter circuit 158 or the ultra low pass filter circuit 160 can be embodied in various electronic structures. For example, capacitors and inductors, and even resistors can be combined in order to design circuits capable of passing certain frequency signals while rejecting others. The structure of low frequency and high frequency circuits is well known to those skilled in the art. Therefore, the low pass filter 156 and the ultra low pass filter 160 are designed to pass low frequencies but block high frequencies, while the high pass filter 158 passes high frequencies but blocks low frequencies. In one embodiment, the low pass filter 156 passes 2 MHz and blocks 27 MHz, the ultra low pass filter 160 blocks 2 MHz and 27 MHz and the high pass filter 158 passes 27 MHz and blocks 2 MHz. While the RF currents generated by power generators 132 and 134 have been represented as 2 MHz and 27 MHz as the low and high frequencies, respectively, the invention is by no means limited to these RF frequencies. Hence, the filter circuits 156, 158 and 160 are designed to perform their respective functions according to the frequency of RF currents being employed in the plasma reactor. It should be noted that additional filters can be added for cases in which a number of specific frequencies need to be controlled.

FIG. 5 illustrates block diagram 180 depicting a cross section of a plasma etch reactor with a selector switch positioned such that neither the high nor the low frequency RF currents are blocked from the top electrode 146. In this embodiment, RF currents represented by arrows 166 and 168 travel unrestricted through the top electrode 146. In this embodiment, selector switch 154 is engaged with filter array bypass 162 which in turn connects to return extension 164. With no filter circuitry employed in this path, each of the high and low frequency RF currents are enabled to pass through the top electrode and return to their corresponding generators 132 and 134. It should be appreciated that the RF currents are coupled in this embodiment as with the embodiment described in reference to FIG. 4. Contrary to the embodiment of FIG. 4, the voltage bias at the wafer 170 of FIG. 5 is very high. In this embodiment, the area ratio between the top and the bottom electrodes is large, thereby driving the voltage bias at the wafer 170 high. The high bias energy correlates to a high ion energy, which is optimal for drilling small deep holes such as a via etch or even other etches with high aspect ratio geometries.

It should be appreciated that the plasma etch reactors are of a cylindrical design and therefore the area of the electrodes are related to the square of the diameter of the electrodes. Accordingly, small differences in the diameter of the top electrode 146 and bottom electrode 138 are quadratically increased to impact the bias voltage at the wafer. More importantly, the above described embodiments may be applied to any etch or deposition reactor regardless of the diameters of the electrodes. By applying the selector switch and designing the top electrode to be electrically isolated, the etch system is freed from design restrictions which fix a bias voltage at the wafer. Hence, the etch system is capable of accommodating multiple etch applications requiring widely varying bias voltages at the wafer. At the same time, the de-coupling of the dual frequencies supplied to the bottom electrode allows for independent control of the ion energy and plasma density.

FIG. 6 illustrates flowchart 184 providing a method for processing a substrate in an etch system having selectable modes of operation. Flowchart 184 initializes with operation 186 where an etch system having selectable modes of operation is provided. Here, the etch system as described above in reference to FIGS. 2–5 is provided. The filter array of FIGS. 2–5, in conjunction with the selector switch, allows for the etch system to provide for a wide range of control of the bias voltage at the wafer and to independently control the plasma density and the ion energy. Next, the method advances to operation 188 where an etch recipe is selected to set an etch environment in the etch system. Here the temperature and pressure of the plasma etch chamber, the power to the driven electrode and the flow rates of the etchant chemicals into the chamber are set. In one embodiment, dual RF currents are applied to the bottom electrode, where one RF generator is of a higher frequency than the other RF generator.

The method of FIG. 6 continues with operation 190 where one of the modes of operation to establish a bias voltage at the substrate is selected. Here, a position for the selector switch is provided. As described in reference to FIGS. 2–5, the selector switch, in conjunction with the filter array, influences the bias voltage at the substrate irregardless of the geometry of the plasma etch chamber. Hence, a user can optimize the bias voltage for the particular etch process. For example, deep drilling of small holes, i.e., vias in dual damascene processes requires high ion energy, therefore, a high bias voltage. The high bias voltage is achieved by a selector switch setting as illustrated in FIG. 5. Alternatively, an etch requiring a low bias voltage, such as trench etching for dual damascene applications, may be accommodated by setting the selector switch as illustrated in FIG. 4. Moreover, the etch process may require independent control of the plasma density and ion energy, therefore the selector switch is positioned to de-couple the dual frequency RF currents as illustrated in FIGS. 2 and 3. As mentioned above, the plasma density and ion energy may be independently controlled by separate controls which adjust the power to each of the RF generators once the frequencies are de-coupled.

The method of FIG. 6 then proceeds to operation 192, where the etch is performed under the set etch environment and the selected bias voltage. The parameters established for the etch environment in operation 188 are implemented here. Additionally, the selector switch position engages a filter or a filter array bypass such that the selected bias voltage at the substrate is provided. As mentioned above, the selector switch position determines whether the RF frequencies are de-coupled, thereby allowing for independent control of the plasma density and the ion energy. Next, the method progresses to operation 194 where another etch may be performed. It should be understood that the selectable modes of operation allow for consecutive etches to be performed without removing the substrate or exposing the substrate to the outside environment, thereby risking contamination. As mentioned above, multiple etch processes requiring different bias voltages or independent control of the plasma density and ion energy can be performed by shifting the selector switch position. The limitations imposed by the geometry of the plasma etch chamber are removed as a barrier, so that optimal etch conditions can be provided. Accordingly, a dual damascene etch for a high aspect ratio via, requiring high ion energy, can be followed by a trench etch requiring low ion energy by adjusting the selector switch.

FIG. 7 illustrates block diagram 196 depicting a control system for executing an etch recipe for etch operations performed in a plasma etch reactor. Etch recipe 198 includes control values for process variables for etch operation A 200, etch operation B 202 and etch operation C 204. In one embodiment, the process variables include pressure and temperature of the plasma etch chamber, power to the driven electrode, gas flow rates and a selector switch setting as displayed for etch operation A 200. Particular control values are specified for each process variable of etch operation A 200, etch operation B 202 and etch operation C 204 in one embodiment of the invention. It should be appreciated that the particular control values may differ between etch operations A, B and C. For example with respect to dual damascene processing, etch operation A 200 may be performing a trench etch, thereafter, etch operation B 202 may be performing a via etch (e.g., for trench first processing). Accordingly, the selector switch setting for etch operation A 200 provides a low ion energy, while the selector switch setting for etch operation B 202 provides a high ion energy in one embodiment of the invention. It should be appreciated that the etch operations may be performed consecutively without the need to break vacuum within the etch chamber to make modifications.

Continuing with FIG. 7, the etch recipe 198 is executed by reactor processing software 206. Computer system 208 includes a central processing unit (CPU) for executing the reactor processing software 206. Computer system 208 is in communication with system controller 210. In one embodiment of the invention, system controller 210 receives input from computer system 208 in which the input includes values for the control variables for a particular etch operation to be performed in plasma etch reactor 216. System controller 210 includes hardware circuitry configured to transform the input from computer system 208 to control signals 212 for each of the process variables for the etch operation in one embodiment of the invention. Control signals 212 are supplied to the corresponding controllers for the process variables of the plasma etch reactor 216 via controller interface 214.

Still referring to FIG. 7, plasma etch reactor 216 is adapted to accept a wafer 218. In accordance with one embodiment of the invention, plasma etch reactor 216 is configured as depicted in FIGS. 2–5. Facilities 220 for plasma etch reactor 216 supply the necessary utilities consumed by plasma etch reactor 216. For example, power supply for the RF generators or a chuck voltage is included here. Additionally, gas supplies such as nitrogen, oxygen, argon, helium, etch chemistries, and clean dry air (CDA) are provided to the plasma etch reactor in one embodiment of the invention. It should be appreciated that computer system 208 may include a monitor 222. In accordance with one embodiment of the invention the monitor display a graphical user interface (GUI) providing real-time process displays of the plasma etch reactor 216. Additionally, the GUI of monitor 222 presents interactive displays, thereby allowing a user to modify values of a control variable for an etch operation being performed in plasma etch reactor 216.

Although the foregoing invention has been described in some detail for purposes of clarity of understanding, it will be apparent that certain changes and modifications may be practiced within the scope of the appended claims. Accordingly, the present embodiments are to be considered as illustrative and not restrictive, and the invention is not to be limited to the details given herein, but may be modified within the scope and equivalents of the appended claims. 

1. A method for etching a wafer in a plasma etch chamber, comprising method operations of: providing an etch system, the etch system having a bottom electrode coupled to a first and a second radio frequency (RF) power sources to generate a plasma and a top electrode coupled to a selector switch, the selector switch is coupled to a filter array with a set of filtering settings defining selectable modes of operation to process a substrate; selecting an etch recipe, the etch recipe being configured to set an etch environment in the etch system; selecting one of the modes of operation to establish a selected bias voltage at the substrate for the selected etch recipe by interconnecting the top electrode to a selected filter setting of the set of filtering settings; and performing an etch, the etch occurring under the set etch environment and the selected bias voltage.
 2. The method for etching a wafer as recited in claim 1, wherein selecting one of the modes of operation to establish a selected bias voltage at the substrate further comprises: controlling one of a plasma density or an ion energy of a plasma in the plasma etch chamber.
 3. The method for etching a wafer as recited in claim 1, wherein the selectable modes of operation alter an effective area ratio between the top and the bottom electrode of the etch system.
 4. The method for etching a wafer as recited in claim 1, wherein selecting one of the modes of operation to establish a selected bias voltage at the substrate further comprises: providing a first and a second return path for a high frequency and a low frequency RF current passing through the etch environment; and blocking one of the high frequency and the low frequency RF current from the first return path.
 5. The method for etching a wafer as recited in claim 4, wherein the first return path includes the top electrode, the top electrode being electrically isolated from the second return path.
 6. The method for etching a wafer as recited in claim 4, wherein the blocking one of the high frequency and the low frequency RF current from the first return path employs the array of filters, the array of filters linked to the top electrode through the selector switch.
 7. The method for etching a wafer as recited in claim 1, wherein the etch recipe includes parameters for a temperature and a pressure of the etch environment, flow rates, power to the driven electrode, and a selector switch setting.
 8. In an etch chamber, a method for processing a wafer, comprising method operations of: providing a first electrode coupled to a first and second radio frequency (RF) power sources to generate a plasma; providing a second electrode electrically isolated from a ground extension associated with the second electrode; providing a first and a second return path for a high frequency and a low frequency RF current of the plasma passing through the first electrode by providing a filter array with a set of filtering settings; selecting a filter setting from the set of filtering settings to cause a current associated with the first RF power source to follow the first return path and a current associated with the second RF power source to follow the second return path; and performing an etch operation.
 9. The method of claim 8, wherein the method operation of selecting a filter setting from the set of filtering settings to cause a current associated with the first RF power source to follow the first return path and a current associated with the second RF power source to follow the second return path includes, blocking the high frequency RF current from the second electrode.
 10. The method of claim 8, wherein the method operation of selecting a filter setting from the set of filtering settings to cause a current associated with the first RF power source to follow the first return path and a current associated with the second RF power source to follow the second return path includes, blocking the low frequency RF current from the second electrode.
 11. The method of claim 8, wherein the method operation of selecting a filter setting from the set of filtering settings to cause a current associated with the first RF power source to follow the first return path and a current associated with the second RF power source to follow the second return path includes, blocking both the low frequency RF current and the high frequency RF current from the second electrode.
 12. The method of claim 8, wherein the method operation of providing a first and a second return path for a high frequency and a low frequency RF current passing through the first electrode includes, defining the first return path through the second electrode; and isolating the second return path from the second electrode through an insulator. 